package models
Ordering
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Visibility
- Public
- Protected
Type Members
- case class AXI4EdgeSummary(maxReadTransfer: Int, maxWriteTransfer: Int, idReuse: Option[Int], maxFlight: Option[Int], address: Seq[AddressSet]) extends Product with Serializable
- class AXI4Releaser extends Module
- class AXI4ReleaserIO extends ParameterizedBundle
- class AbstractClockGate extends ExtModule
External module for a clock gate.
External module for a clock gate.
Controls a clock signal (I) via an enable input (CE).
- class AddressCollisionChecker extends NastiModule
- class AddressCollisionCheckerIO extends NastiBundle
- class AddressRangeCounter extends NastiModule
- class AddressRangeCounterRequest extends NastiBundle
- class AddressRangeCounterUnitTest extends UnitTest
- class AllocationIO extends Bundle
- case class BankConflictConfig(maxBanks: Int, maxLatencyBits: Int = 12, params: BaseParams) extends BaseConfig with Product with Serializable
- class BankConflictIO extends SplitTransactionModelIO
- class BankConflictMMRegIO extends SplitTransactionMMRegIO
- class BankConflictModel extends SplitTransactionModel
- class BankConflictReference extends Bundle
- class BankQueueEntry extends Bundle
- class BankStateTracker extends Module with HasDRAMMASConstants
- class BankStateTrackerIO extends Bundle with HasLegalityUpdateIO
- class BankStateTrackerO extends Bundle with CommandLegalBools
- abstract class BaseConfig extends AnyRef
- abstract class BaseDRAMMMRegIO extends MMRegIO with HasConsoleUtils
- case class BaseParams(maxReads: Int, maxWrites: Int, nastiKey: Option[NastiParameters] = None, edge: Option[AXI4EdgeParameters] = None, targetAddressOffset: Option[BigInt] = None, targetAddressSpaceSize: Option[BigInt] = None, maxReadLength: Int = 256, maxReadsPerID: Option[Int] = None, maxWriteLength: Int = 256, maxWritesPerID: Option[Int] = None, detectAddressCollisions: Boolean = false, stallEventCounters: Boolean = false, localHCycleCount: Boolean = false, latencyHistograms: Boolean = false, llcKey: Option[LLCParams] = None, xactionCounters: Boolean = true, beatCounters: Boolean = false, targetCycleCounter: Boolean = false, occupancyHistograms: Seq[Int] = Seq(0, 2, 4, 8), addrRangeCounters: BigInt = BigInt(0)) extends Product with Serializable
- class BlockMetadata extends Bundle
- class CollapsingBuffer[T <: Data] extends Module
- class CollapsingBufferIO[T <: Data] extends Bundle
- class CommandBusMonitor extends Module
- trait CommandLegalBools extends AnyRef
- case class CompleteConfig(userProvided: BaseConfig, axi4Widths: NastiParameters, axi4Edge: Option[AXI4EdgeSummary] = None, memoryRegionName: Option[String] = None) extends HasSerializationHints with Product with Serializable
- class CounterIncrementIO extends Bundle
- class CounterReadoutIO extends Bundle
- class CounterTable extends Module
- class CounterTableUnitTest extends UnitTest
- class CurrentReadResp extends ParameterizedBundle with HasNastiParameters
- class CurrentWriteResp extends ParameterizedBundle with HasNastiParameters
- class CycleTracker extends Module
- class DRAMBackend extends Module
- class DRAMBackendIO extends Bundle
- case class DRAMBackendKey(writeDepth: Int, readDepth: Int, latencyBits: Int) extends Product with Serializable
- abstract class DRAMBaseConfig extends BaseConfig with HasDRAMMASConstants
- class DRAMProgrammableTimings extends Bundle with HasDRAMMASConstants with HasProgrammableRegisters with HasConsoleUtils
- class DownCounter extends Module
- case class DramOrganizationParams(maxBanks: Int, maxRanks: Int, dramSize: BigInt, lineBits: Int = 8) extends Product with Serializable
- class DualQueue[T <: Data] extends Module
- class DynamicLatencyPipe[T <: Data] extends Module with HasFIFOPointers
- class DynamicLatencyPipeIO[T <: Data] extends QueueIO[T]
- class EgressReq extends ParameterizedBundle with HasNastiParameters
- class EgressResp extends ParameterizedBundle
- trait EgressUnitParameters extends AnyRef
- class FASEDBridge extends BlackBox with Bridge[HostPortIO[FASEDTargetIO], FASEDMemoryTimingModel]
- class FASEDMemoryTimingModel extends BridgeModule[HostPortIO[FASEDTargetIO]] with UsesHostDRAM
- class FASEDTargetIO extends Bundle
- class FIFOAddressMatcher extends Module with HasFIFOPointers
- case class FIFOMASConfig(dramKey: DramOrganizationParams, transactionQueueDepth: Int, backendKey: DRAMBackendKey = DRAMBackendKey(4, 4, DRAMMasEnums.backendLatencyBits), params: BaseParams) extends DRAMBaseConfig with Product with Serializable
- class FIFOMASIO extends TimingModelIO
- class FIFOMASMMRegIO extends BaseDRAMMMRegIO
- class FIFOMASModel extends TimingModel with HasDRAMMASConstants
- case class FirstReadyFCFSConfig(dramKey: DramOrganizationParams, schedulerWindowSize: Int, transactionQueueDepth: Int, backendKey: DRAMBackendKey = DRAMBackendKey(4, 4, DRAMMasEnums.backendLatencyBits), params: BaseParams) extends DRAMBaseConfig with Product with Serializable
- class FirstReadyFCFSEntry extends MASEntry
- class FirstReadyFCFSIO extends TimingModelIO
- class FirstReadyFCFSMMRegIO extends BaseDRAMMMRegIO
- class FirstReadyFCFSModel extends TimingModel with HasDRAMMASConstants
- class FreeList extends Module
A simple freelist
- class FuncModelProgrammableRegs extends Bundle with HasProgrammableRegisters
- trait HasAXI4Id extends HasNastiParameters
- trait HasAXI4IdAndLen extends HasAXI4Id
- trait HasConsoleUtils extends AnyRef
- trait HasDRAMMASConstants extends AnyRef
- trait HasFIFOPointers extends AnyRef
- trait HasLegalityUpdateIO extends AnyRef
- trait HasProgrammableRegisters extends Bundle
- trait HasReqMetaData extends HasAXI4IdAndLen
- class HostLatencyHistogram extends Module
- class HostLatencyHistogramIO extends Bundle
- class IngressModule extends Module with IngressModuleParameters
- trait IngressModuleParameters extends AnyRef
- trait IsRuntimeSetting extends HasConsoleUtils
- case class JSONField(value: BigInt, units: String) extends Product with Serializable
- case class JSONSetting(default: BigInt, query: String, lookUp: (Map[String, BigInt]) => BigInt, min: BigInt = 0, max: Option[BigInt] = None) extends IsRuntimeSetting with Product with Serializable
- class LLCModel extends NastiModule
- class LLCModelIO extends Bundle
- case class LLCParams(ways: WRange = WRange(1, 8), sets: WRange = WRange(32, 4096), blockBytes: WRange = WRange(8, 128), mshrs: WRange = WRange(1, 8)) extends Product with Serializable
- class LLCProgrammableSettings extends Bundle with HasProgrammableRegisters with HasConsoleUtils
- class LatencyHistogramUnitTest extends UnitTest
- class LatencyPipe extends SplitTransactionModel
- case class LatencyPipeConfig(params: BaseParams) extends BaseConfig with Product with Serializable
- class LatencyPipeIO extends SplitTransactionModelIO
- class LatencyPipeMMRegIO extends SplitTransactionMMRegIO
- class MASEntry extends Bundle
- abstract class MMRegIO extends Bundle with HasProgrammableRegisters
- class MSHR extends NastiBundle
- class MemModelTargetIO extends ParameterizedBundle
- class MemoryModelMonitor extends Module
- class NastiReqChannels extends ParameterizedBundle
- class NastiRespChannels extends ParameterizedBundle
- class ProgrammableSubAddr extends Bundle with HasProgrammableRegisters
- class RATEntry extends Bundle
- class RankPowerIO extends Bundle
- class RankPowerMonitor extends Module with HasDRAMMASConstants
- class RankRefreshUnitIO extends Bundle
- class RankStateTracker extends Module with HasDRAMMASConstants
- class RankStateTrackerIO extends Bundle with HasLegalityUpdateIO with HasDRAMMASConstants
- class RankStateTrackerO extends Bundle with CommandLegalBools
- class ReadEgress extends Module
- class ReadEgressReqIO extends NastiBundle
- class ReadEgressResponseIO extends NastiBundle
- class ReadPipeEntry extends Bundle
- class ReadResponseMetaData extends Bundle with HasAXI4IdAndLen
- class RefreshUnit extends Module
- class ReorderBuffer extends Module
- case class RuntimeSetting(default: BigInt, query: String, min: BigInt = 0, max: Option[BigInt] = None) extends IsRuntimeSetting with Product with Serializable
- abstract class SplitTransactionMMRegIO extends MMRegIO
- abstract class SplitTransactionModel extends TimingModel
- abstract class SplitTransactionModelIO extends TimingModelIO
- class StoredBeat extends NastiBundle with HasNastiData
- abstract class TimingModel extends Module with IngressModuleParameters with EgressUnitParameters with HasNastiParameters
- abstract class TimingModelIO extends Bundle
- class TransactionMetaData extends Bundle with HasAXI4IdAndLen
- class UnifiedFIFOXactionScheduler extends Module
- class ValidNastiReqChannels extends ParameterizedBundle
- case class WRange(min: Int, max: Int) extends Product with Serializable
- class WriteEgress extends Module
- class WriteEgressReqIO extends NastiBundle
- class WriteEgressResponseIO extends NastiBundle
- class WritePipeEntry extends Bundle
- class WriteResponseMetaData extends Bundle with HasAXI4Id
- class XactionSchedulerEntry extends NastiBundle
- class XactionSchedulerIO extends Bundle
Value Members
- object AXI4EdgeSummary extends Serializable
- object AddressCollisionCheckMain extends App
- object AddressRangeCounter
- object BankConflictConstants
- object CollapsingBuffer
- object DRAMMasEnums extends HasDRAMMASConstants
- object FASEDBridge
- case object FasedAXI4Edge extends Field[Option[AXI4EdgeSummary]] with Product with Serializable
- object HostLatencyHistogram
- object MSHR
- object NastiReqChannels
- object RATEntry
- object RankPowerIO
- object ReadResponseMetaData
- object TransactionMetaData
- object WriteResponseMetaData