Packages

c

midas.models

FIFOMASModel

class FIFOMASModel extends TimingModel with HasDRAMMASConstants

Linear Supertypes
HasDRAMMASConstants, TimingModel, HasNastiParameters, EgressUnitParameters, IngressModuleParameters, Module, RawModule, BaseModule, IsInstantiable, HasId, InstanceId, AnyRef, Any
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  2. By Inheritance
Inherited
  1. FIFOMASModel
  2. HasDRAMMASConstants
  3. TimingModel
  4. HasNastiParameters
  5. EgressUnitParameters
  6. IngressModuleParameters
  7. Module
  8. RawModule
  9. BaseModule
  10. IsInstantiable
  11. HasId
  12. InstanceId
  13. AnyRef
  14. Any
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Visibility
  1. Public
  2. Protected

Instance Constructors

  1. new FIFOMASModel(cfg: FIFOMASConfig)(implicit p: Parameters)

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##: Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: => T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit
    Definition Classes
    BaseModule
  8. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  9. val backend: DRAMBackend
  10. val backendLatencyBits: Int
    Definition Classes
    HasDRAMMASConstants
  11. val bankMuxes: Vec[BankStateTrackerO]
  12. def bytesToXSize(bytes: UInt): UInt
    Definition Classes
    HasNastiParameters
  13. val canCASR: Bool
  14. val canCASW: Bool
  15. val casAutoPRE: Bool
  16. val cfg: BaseConfig
    Definition Classes
    TimingModelIngressModuleParameters
  17. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  18. final val clock: Clock
    Definition Classes
    Module
  19. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.CloneNotSupportedException]) @native() @IntrinsicCandidate()
  20. val cmdBank: UInt
  21. val cmdBankOH: UInt
  22. val cmdBusBusy: DownCounter
  23. val cmdMonitor: CommandBusMonitor
  24. val cmdRank: UInt
  25. val cmdRow: UInt
  26. val compileOptions: CompileOptions
    Definition Classes
    RawModule
  27. val currentBank: BankStateTrackerO
  28. val currentRank: RankStateTrackerO
  29. val currentReference: DecoupledIO[MASEntry]
  30. val currentRowHit: Bool
  31. def desiredName: String
    Definition Classes
    BaseModule
  32. val egressUnitDelay: Int
    Definition Classes
    EgressUnitParameters
  33. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  34. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  35. final def getClass(): Class[_ <: AnyRef]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @IntrinsicCandidate()
  36. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  37. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  38. def hasSeed: Boolean
    Definition Classes
    HasId
  39. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  40. val ingressARQdepth: Int
    Definition Classes
    IngressModuleParameters
  41. val ingressAWQdepth: Int
    Definition Classes
    IngressModuleParameters
  42. val ingressWQdepth: Int
    Definition Classes
    IngressModuleParameters
  43. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  44. lazy val io: FIFOMASIO
    Definition Classes
    FIFOMASModelTimingModel
  45. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  46. val longName: String
    Definition Classes
    FIFOMASModelTimingModel
  47. val maxDRAMTimingBits: Int
    Definition Classes
    HasDRAMMASConstants
  48. val memReqDone: Bool
  49. val monitor: MemoryModelMonitor
    Definition Classes
    TimingModel
  50. final lazy val name: String
    Definition Classes
    BaseModule
  51. val nastiARUserBits: Int
    Definition Classes
    HasNastiParameters
  52. val nastiAWUserBits: Int
    Definition Classes
    HasNastiParameters
  53. val nastiBUserBits: Int
    Definition Classes
    HasNastiParameters
  54. val nastiExternal: NastiParameters
    Definition Classes
    HasNastiParameters
  55. val nastiRIdBits: Int
    Definition Classes
    HasNastiParameters
  56. val nastiRUserBits: Int
    Definition Classes
    HasNastiParameters
  57. val nastiReq: NastiReqChannels
    Definition Classes
    TimingModel
  58. val nastiReqIden: IdentityModule[NastiReqChannels]
    Definition Classes
    TimingModel
  59. val nastiWIdBits: Int
    Definition Classes
    HasNastiParameters
  60. val nastiWStrobeBits: Int
    Definition Classes
    HasNastiParameters
  61. val nastiWUserBits: Int
    Definition Classes
    HasNastiParameters
  62. val nastiXAddrBits: Int
    Definition Classes
    HasNastiParameters
  63. val nastiXBurstBits: Int
    Definition Classes
    HasNastiParameters
  64. val nastiXCacheBits: Int
    Definition Classes
    HasNastiParameters
  65. val nastiXDataBits: Int
    Definition Classes
    HasNastiParameters
  66. val nastiXIdBits: Int
    Definition Classes
    HasNastiParameters
  67. val nastiXLenBits: Int
    Definition Classes
    HasNastiParameters
  68. val nastiXProtBits: Int
    Definition Classes
    HasNastiParameters
  69. val nastiXQosBits: Int
    Definition Classes
    HasNastiParameters
  70. val nastiXRegionBits: Int
    Definition Classes
    HasNastiParameters
  71. val nastiXRespBits: Int
    Definition Classes
    HasNastiParameters
  72. val nastiXSizeBits: Int
    Definition Classes
    HasNastiParameters
  73. val nastiXUserBits: Int
    Definition Classes
    HasNastiParameters
  74. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  75. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  76. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  77. val numBankStates: Int
    Definition Classes
    HasDRAMMASConstants
  78. val numRankStates: Int
    Definition Classes
    HasDRAMMASConstants
  79. implicit val p: Parameters
  80. def parentModName: String
    Definition Classes
    HasId → InstanceId
  81. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  82. def pathName: String
    Definition Classes
    HasId → InstanceId
  83. val pendingAWReq: SatUpDownCounterIO
    Definition Classes
    TimingModel
  84. val pendingReads: SatUpDownCounterIO
    Definition Classes
    TimingModel
  85. val pendingWReq: SatUpDownCounterIO
    Definition Classes
    TimingModel
  86. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  87. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  88. val powerStats: Seq[RankPowerIO]
  89. def printGenerationConfig: Unit
    Definition Classes
    TimingModel
  90. def printTimingModelGenerationConfig: Unit
    Definition Classes
    FIFOMASModelTimingModel
  91. val rResp: DecoupledIO[ReadResponseMetaData]
    Definition Classes
    TimingModel
  92. val rankStateTrackers: Seq[RankStateTracker]
  93. val refreshUnit: RankRefreshUnitIO
  94. final val reset: Reset
    Definition Classes
    Module
  95. val selectedCmd: UInt
  96. def suggestName(seed: => String): FIFOMASModel.this.type
    Definition Classes
    HasId
  97. final def synchronized[T0](arg0: => T0): T0
    Definition Classes
    AnyRef
  98. val tCycle: UInt
    Definition Classes
    TimingModel
  99. val tNasti: NastiIO

    ************************** CHISEL BEGINS ********************************

    ************************** CHISEL BEGINS ********************************

    Definition Classes
    TimingModel
  100. val tREFIBits: Int
    Definition Classes
    HasDRAMMASConstants
  101. val tREFIWidth: Int
    Definition Classes
    HasDRAMMASConstants
  102. val tRFCBits: Int
    Definition Classes
    HasDRAMMASConstants
  103. val timings: DRAMProgrammableTimings
  104. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  105. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  106. def toString(): String
    Definition Classes
    AnyRef → Any
  107. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  108. val wResp: DecoupledIO[WriteResponseMetaData]
    Definition Classes
    TimingModel
  109. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  110. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  111. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  112. val xactionRelease: AXI4Releaser
    Definition Classes
    TimingModel
  113. val xactionScheduler: UnifiedFIFOXactionScheduler

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.Throwable]) @Deprecated
    Deprecated
  2. def override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  3. def override_clock_=(rhs: Option[Clock]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  4. def override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  5. def override_reset_=(rhs: Option[Bool]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

Inherited from HasDRAMMASConstants

Inherited from TimingModel

Inherited from HasNastiParameters

Inherited from EgressUnitParameters

Inherited from Module

Inherited from RawModule

Inherited from BaseModule

Inherited from IsInstantiable

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped