class DRAMProgrammableTimings extends Bundle with HasDRAMMASConstants with HasProgrammableRegisters with HasConsoleUtils
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- HasConsoleUtils
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- new DRAMProgrammableTimings()
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- final def !=(arg0: Any): Boolean
- Definition Classes
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- final def ##: Int
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- AnyRef → Any
- final def :=(that: => Data)(implicit sourceInfo: SourceInfo, connectionCompileOptions: CompileOptions): Unit
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- final def <>(that: => Data)(implicit sourceInfo: SourceInfo, connectionCompileOptions: CompileOptions): Unit
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- def _cloneTypeImpl: Record
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- def _elementsImpl: Iterable[(String, Any)]
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- def _usingPlugin: Boolean
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- final def asInstanceOf[T0]: T0
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- macro def asTypeOf[T <: Data](that: T): T
- Definition Classes
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- final macro def asUInt: UInt
- Definition Classes
- Data
- def autoSeed(name: String): DRAMProgrammableTimings.this.type
- Definition Classes
- Data → HasId
- val backendLatencyBits: Int
- Definition Classes
- HasDRAMMASConstants
- def binding: Option[Binding]
- Attributes
- protected[chisel3]
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- def binding_=(target: Binding): Unit
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- def circuitName: String
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- def className: String
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- def clone(): AnyRef
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- protected[lang]
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- @throws(classOf[java.lang.CloneNotSupportedException]) @native() @IntrinsicCandidate()
- def cloneType: DRAMProgrammableTimings.this.type
- Definition Classes
- Record → Data
- def do_asTypeOf[T <: Data](that: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T
- Definition Classes
- Data
- def do_asUInt(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- Definition Classes
- Aggregate → Data
- final lazy val elements: SeqMap[String, Data]
- Definition Classes
- Bundle → Record
- final def eq(arg0: AnyRef): Boolean
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- def equals(that: Any): Boolean
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- final def getClass(): Class[_ <: AnyRef]
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- Annotations
- @native() @IntrinsicCandidate()
- def getDefaults(prefix: String = ""): Seq[(String, BigInt)]
- Definition Classes
- HasProgrammableRegisters
- def getElements: Seq[Data]
- Definition Classes
- Record → Aggregate
- def getName(dat: Data): String
- Definition Classes
- HasProgrammableRegisters
- def getSettings(prefix: String = ""): Seq[(String, BigInt)]
- Definition Classes
- HasProgrammableRegisters
- final def getWidth: Int
- Definition Classes
- Data
- def hasSeed: Boolean
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- HasId
- def hashCode(): Int
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- HasId → AnyRef → Any
- def ignoreSeq: Boolean
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- Bundle
- def instanceName: String
- Definition Classes
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- final def isInstanceOf[T0]: Boolean
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- def isLit: Boolean
- Definition Classes
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- final def isWidthKnown: Boolean
- Definition Classes
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- def litOption: Option[BigInt]
- Definition Classes
- Aggregate → Data
- def litValue: BigInt
- Definition Classes
- Aggregate → Data
- val maxDRAMTimingBits: Int
- Definition Classes
- HasDRAMMASConstants
- final def ne(arg0: AnyRef): Boolean
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- AnyRef
- final def notify(): Unit
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- final def notifyAll(): Unit
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- @native() @IntrinsicCandidate()
- val numBankStates: Int
- Definition Classes
- HasDRAMMASConstants
- val numRankStates: Int
- Definition Classes
- HasDRAMMASConstants
- def parentModName: String
- Definition Classes
- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- lazy val regMap: Map[Data, IsRuntimeSetting]
- Definition Classes
- HasProgrammableRegisters
- val registers: Seq[(UInt, IsRuntimeSetting with Product with Serializable)]
- Definition Classes
- DRAMProgrammableTimings → HasProgrammableRegisters
- def requestInput(query: String, default: BigInt, min: Option[BigInt] = None, max: Option[BigInt] = None): BigInt
- Definition Classes
- HasConsoleUtils
- def requestSeqSelection(header: String, possibilities: Seq[String], footer: String = "Selection number", default: BigInt = 0): Int
- Definition Classes
- HasConsoleUtils
- def setDependentRegisters(lut: Map[String, JSONField], freqMHz: BigInt): Unit
- def setUnboundSettings(prefix: String = "test"): Unit
- Definition Classes
- HasProgrammableRegisters
- def suggestName(seed: => String): DRAMProgrammableTimings.this.type
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- val tAL: UInt
- val tCAS: UInt
- def tCAS2tCWL(tCAS: BigInt): BigInt
- val tCCD: UInt
- val tCMD: UInt
- val tCWD: UInt
- val tFAW: UInt
- val tRAS: UInt
- val tRC: UInt
- val tRCD: UInt
- val tREFI: UInt
- val tREFIBits: Int
- Definition Classes
- HasDRAMMASConstants
- val tREFIWidth: Int
- Definition Classes
- HasDRAMMASConstants
- val tRFC: UInt
- val tRFCBits: Int
- Definition Classes
- HasDRAMMASConstants
- val tRP: UInt
- val tRRD: UInt
- val tRTP: UInt
- val tRTRS: UInt
- val tWR: UInt
- val tWTR: UInt
- final def toAbsoluteTarget: ReferenceTarget
- Definition Classes
- NamedComponent → InstanceId
- final def toNamed: ComponentName
- Definition Classes
- NamedComponent → InstanceId
- def toPrintable: Printable
- Definition Classes
- Bundle → Record → Data
- def toString(): String
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- final def toTarget: ReferenceTarget
- Definition Classes
- NamedComponent → InstanceId
- final def wait(arg0: Long, arg1: Int): Unit
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- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
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- @throws(classOf[java.lang.InterruptedException])
- final def wait(): Unit
- Definition Classes
- AnyRef
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- @throws(classOf[java.lang.InterruptedException])
- final def widthOption: Option[Int]
- Definition Classes
- Data