trait UsesHostDRAM extends HostDramHeaderConsts
A BridgeModule mixin indicating it wishes to be allocated FPGA DRAM.
- Self Type
- UsesHostDRAM with Widget
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- HostDramHeaderConsts
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- abstract def memoryMasterNode: AXI4OutwardNode
The AXI4 master node the Bridge will use to present memory requests to its allocated DRAM.
- abstract def memoryRegionName: String
- Definition Classes
- HostDramHeaderConsts
- abstract def memorySlaveConstraints: MemorySlaveConstraints
A specification for the memory region this Bridge wishes to be allocated.
A specification for the memory region this Bridge wishes to be allocated. See MemorySlaveConstraints for more explanation.
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