2018

FireSim 1.4.0 released with new debugging tools!

Posted by Sagar Karandikar

Just in time for our tutorial at the first Chisel Community Conference, we’ve released a new version of FireSim that adds lots of new features! The headlining features with this release are new debugging tools, including assertion synthesis and Rocket Chip/BOOM commit log tracing. We’ve also bumped to more recent versions of Rocket Chip/BOOM, updated the block device model to be deterministic, started preparing infrastructure necessary to merge FireSim’s “supernode” mode to master, and done lots of other internal cleanup. See the full changelog on GitHub.

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FireSim 1.3.1 Released with support for the BOOM Out-of-Order Superscalar RISC-V Processor!

Posted by Sagar Karandikar

We’ve released a new version of FireSim that adds support for Berkeley Out-of-Order Machine (BOOM) designs as a target! BOOM is a superscalar out-of-order RISC-V implementation built at UC Berkeley by Chris Celio, which you can find more about on GitHub. We’ve successfully run SPECint 2017 with reference inputs to completion on Linux running on BOOM in FireSim on FPGAs on Amazon EC2 F1. Network support is also present, i.e. you can SSH into BOOM running on the FPGA and access the internet from within BOOM running on the FPGA.

For example, check out this GIF of a FireSim-simulated BOOM connected to the Internet and posting a tweet! The gif is real-time, not sped-up.

And the aforementioned posted tweet:

To try BOOM in FireSim on EC2 F1 with pre-built FPGA images, you can follow our Getting Started Guide/Tutorials which have been updated with notes about how to use BOOM-based designs.

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FireSim now open-sourced!

Posted by Sagar Karandikar

We’re excited to announce that FireSim is now open-source! FireSim enables cycle-accurate FPGA-accelerated simulation of Rocket Chip-based systems on Amazon EC2 F1 at 10s to 100s of MHz depending on simulation scale (e.g. ~150 MHz for a single quad-core Rocket Chip, ~10 MHz for a 1024-node, 4096-core networked datacenter of Rocket Chips with an aggregate of 16 TB of memory).

You can find the FireSim release here: github.com/firesim/firesim.

We’ve written extensive documentation, which you can find here: docs.fires.im.

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FireSim accepted to ISCA 2018!

Posted by Sagar Karandikar

FireSim has been accepted to ISCA 2018!

Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Katz, Jonathan Bachrach, and Krste Asanović. FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. To appear, In proceedings of the 45th International Symposium on Computer Architecture (ISCA’18), Los Angeles, CA, June 2018.

Stay tuned for the paper! Check out the full program here.

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2017

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