What is FireSim?

FireSim is an open-source cycle-accurate, FPGA-accelerated scale-out computer system simulation platform developed in the Berkeley Architecture Research Group in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley.

FireSim is capable of cycle-exactly simulating from one to thousands of multi-core compute nodes, derived directly from silicon-proven and open target-RTL (RISC-V Rocket Chip and BOOM), with an optional cycle-accurate network simulation tying them together. FireSim runs on public cloud FPGAs on AWS EC2 F1, removing the high capex traditionally involved in large-scale FPGA-based simulation. FireSim also provides a Linux distribution that is compatible with the systems it simulates and automates the process of including new workloads into this Linux distribution. Depending on simulation scale, FireSim simulations run at 10s to 100s of MHz, fast enough to interact with Linux on the simulated system at the commandline, like a real computer. Users can even SSH into simulated systems in FireSim and access the Internet from within them.

FireSim is useful both for datacenter architecture research as well as running many single-node architectural experiments in parallel on FPGAs. By harnessing a standardized host platform and providing a large amount of automation/tooling, FireSim drastically simplifies the process of building and deploying large-scale FPGA-based hardware simulations.

For more details, see our ISCA 2018 paper. You can also check-out our 2-minute lightning talk for ISCA on YouTube and our full talk slides from ISCA.

Getting Started

To get started with FireSim, you can find our extensive documentation and tutorials at docs.fires.im. The FireSim codebase lives in the GitHub Repo at github.com/firesim/firesim.

Latest Blog Posts

FireSim 1.4.0 released with new debugging tools!

Posted by Sagar Karandikar

Just in time for our tutorial at the first Chisel Community Conference, we’ve released a new version of FireSim that adds lots of new features! The headlining features with this release are new debugging tools, including assertion synthesis and Rocket Chip/BOOM commit log tracing. We’ve also bumped to more recent versions of Rocket Chip/BOOM, updated the block device model to be deterministic, started preparing infrastructure necessary to merge FireSim’s “supernode” mode to master, and done lots of other internal cleanup. See the full changelog on GitHub.


FireSim 1.3.1 Released with support for the BOOM Out-of-Order Superscalar RISC-V Processor!

Posted by Sagar Karandikar

We’ve released a new version of FireSim that adds support for Berkeley Out-of-Order Machine (BOOM) designs as a target! BOOM is a superscalar out-of-order RISC-V implementation built at UC Berkeley by Chris Celio, which you can find more about on GitHub. We’ve successfully run SPECint 2017 with reference inputs to completion on Linux running on BOOM in FireSim on FPGAs on Amazon EC2 F1. Network support is also present, i.e. you can SSH into BOOM running on the FPGA and access the internet from within BOOM running on the FPGA.

For example, check out this GIF of a FireSim-simulated BOOM connected to the Internet and posting a tweet! The gif is real-time, not sped-up.

And the aforementioned posted tweet:

To try BOOM in FireSim on EC2 F1 with pre-built FPGA images, you can follow our Getting Started Guide/Tutorials which have been updated with notes about how to use BOOM-based designs.


See older posts on the FireSim Blog »