What is FireSim?

FireSim is an open-source cycle-accurate FPGA-accelerated full-system hardware simulation platform that runs on cloud FPGAs (Amazon EC2 F1). FireSim is actively developed in the Berkeley Architecture Research Group in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley.

To get started with FireSim, you can find our documentation and tutorials at docs.fires.im. The FireSim codebase is open-source and lives at github.com/firesim/firesim.

This recent video from the Chisel Community Conference dives in-depth into FireSim. You can also scroll further down to read more FAQs.

What can I simulate with FireSim?

FireSim can simulate arbitrary hardware designs written in Chisel or designs that can be transformed into FIRRTL (including early work on supporting Verilog designs via Yosys’s Verilog to FIRRTL flow). With FireSim, you can write your own RTL (processors, accelerators, etc.) and run it at near-FPGA-prototype speeds on cloud FPGAs, while obtaining cycle-accurate performance results (i.e. matching what you would find if you taped-out a chip). Depending on the hardware design and the simulation scale, FireSim simulations run at 10s to 100s of MHz. You can also integrate custom software models for components that you don’t want/need to write as RTL.

FireSim was originally developed to simulate datacenters by combining open RTL for RISC-V processors with a custom cycle-accurate network simulation. By default, FireSim provides all the RTL and models necessary to cycle-exactly simulate from one to thousands of multi-core compute nodes, derived directly from silicon-proven and open target-RTL (RISC-V Rocket Chip and BOOM), with an optional cycle-accurate network simulation tying them together. FireSim also provides a Linux distribution that is compatible with the RISC-V systems it simulates and automates the process of including new workloads into this Linux distribution. These simulations run fast enough to interact with Linux on the simulated system at the command line, like a real computer. Users can even SSH into simulated systems in FireSim and access the Internet from within them.

What are some concrete use cases?

Where can I run FireSim?

FireSim runs on public cloud FPGAs on AWS EC2 F1, removing the high capex traditionally involved in large-scale FPGA-based simulation. FireSim is useful both for datacenter architecture research and for modeling or prototyping novel, single-SoC Chisel designs at 10s to 100s of MHz. By harnessing a standardized host platform and providing extensive automation/tooling, FireSim drastically simplifies the process of building and deploying large-scale FPGA-accelerated hardware simulations.

Our ISCA 2018 paper discusses the FireSim framework from the perspective of simulating a 1024-node datacenter built from custom RTL and network models. A more concise version of this paper is also available in our IEEE Micro Top Picks 2018 article. The beginning of the YouTube video above talks about this use case in-detail. You can also check-out our 2-minute lightning talk for ISCA on YouTube and our full talk slides from ISCA. Check out the Publications page to see the growing list of projects and papers that have used or are currently using FireSim.

Getting Started with FireSim

To get started with FireSim, you can find extensive documentation and tutorials at docs.fires.im. The FireSim codebase lives at github.com/firesim/firesim.

Recent News

Golden Gate and Centrifuge Papers Presented at ICCAD 2019!

Posted by David Biancolin

This year at ICCAD we had two FireSim-related papers: Golden Gate and Centrifuge.

Jenny Huang presented Centrifuge, an end-to-end, HLS-based compiler framework for rapid hardware-software co-design. Using high-level synthesis, Centrifuge quickly generates a space of different RoCC accelerators. These accelerators are then integrated as verilog black-boxes in a Chipyard-based SoC, and simulated directly in FireSim. (Paper, Slides)

Later, Albert Magyar presented Golden Gate (MIDAS II), the lastest version of the FIRRTL compiler used in FireSim (included in the FireSim 1.7.0 release), Unlike MIDAS, Golden Gate can apply area-optimizations automatically, larger designs onto a single FPGA. By optimizing multi-ported memories, Golden Gate can fit 50% more BOOM cores on a single EC2 F1.2xlarge than MIDAS. (Paper, Slides)


Tutorial on FireSim and Chipyard at MICRO 2019!

Posted by Sagar Karandikar

We’re running a hands-on tutorial on FireSim and Chipyard at the 2019 International Symposium on Microarchitecture in Columbus, OH on October 12, 2019. Learn more here: https://fires.im/micro-2019-tutorial/

Slides will be available after the tutorial, but only attendees will get to work hands-on on EC2 for free, thanks to the generosity of AWS and Xilinx. Hope to see you there!


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