Table of Contents
- Overview
- What are FireSim and Chipyard?
- Tutorial Schedule
- Attendee Logistics/Requirements
- Registration
Overview
We’re running a full-day tutorial on FireSim and Chipyard at MICRO 2021!
Attendees will learn how to customize an industry and silicon-proven RISC-V microprocessor design, how to run their own high-performance FPGA-accelerated simulations of their design in the cloud, and how to push their design to silicon, guided by the FireSim and Chipyard developers. See the tentative schedule below for more details.
What are FireSim and Chipyard?
Chipyard is a one-stop shop for generating complex RISC-V SoCs, including in-order and out-of-order processors, uncore components, vector co-processors, and other kinds of accelerators. Users can customize any component of the system and push it through automated ASIC flows (e.g. Hammer), software simulation (e.g. Verilator and VCS), and FPGA-accelerated simulation flows (e.g. FireSim) to enable agile end-to-end computer architecture research with a single re-usable toolchain.
FireSim is an open-source FPGA-accelerated simulation framework that can simulate designs built in Chipyard and deploy them to cloud FPGAs, running complex software stacks (e.g. Linux + applications) at 100s of MHz. FireSim simulations exactly and deterministically model Chipyard designs, matching cycle-by-cycle bit-by-bit behavior of the design as if it were taped out in silicon. I/Os like DRAM, UART, and Ethernet are also modeled cycle-accurately, allowing users to model complex systems, including large clusters, beyond the capabilities of test-chips.
Together, Chipyard and FireSim bridge the gap between open-hardware and architecture research, automating many common tasks of architecture and VLSI researchers in a single, easy-to-use platform.
Tutorial Schedule
Time (EDT) | Session Name | Speaker | Slides |
---|---|---|---|
10:00am | Introduction/Overview, Logistics | Sagar Karandikar | |
10:05am | Chipyard Basics | Jerry Zhao | |
10:35am | Building Custom RISC-V SoCs in Chipyard | Jerry Zhao | |
11:05am | Integrating Verilog Designs in Chipyard | Abraham Gonzalez | |
11:15am | Coffee Break | ||
11:25am | Hammer VLSI Flow | Harrison Liew | |
11:55am | FPGA Prototyping | James Dunn | |
12:25pm | FireSim Introduction | Sagar Karandikar | |
12:55pm | Lunch | ||
1:45pm | Building Hardware Designs in FireSim | David Biancolin | |
2:15pm | Building Software Workloads with FireMarshal | Nathan Pemberton | |
2:45pm | Running a FireSim Simulation: Password Strength Checking on a RISC-V SoC with SHA-3 Accelerators and Linux | Albert Ou | |
3:15pm | Coffee Break | ||
3:25pm | Debugging and Profiling FireSim-Simulated Designs | Abraham Gonzalez | |
3:50pm | Conclusion | Abraham Gonzalez | |
4:00pm | End of Tutorial |
Attendee Logistics/Requirements
No prior experience with FireSim/Chipyard/RISC-V/Chisel is necessary.
Registration
To attend the tutorial, you must register for MICRO 2021.
Stay tuned!
We will continue to update this page as the tutorial is finalized. Join the FireSim mailing list and follow the FireSim Twitter account to stay up-to-date as we finalize the tutorial!