object ResetSynchronizer
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- def apply(src_rst: Bool, dest_clk: Clock, initValue: Boolean, stages: Int = 4): Bool
Synchronizes a reset to a destination clock using a Xilinx Parameterized Macro (XPM) for which Vivado will generate the correct timing and design constraints automatically.
Synchronizes a reset to a destination clock using a Xilinx Parameterized Macro (XPM) for which Vivado will generate the correct timing and design constraints automatically.
- src_rst
Input reset, could be AsyncReset, feel free to call toBool
- dest_clk
The clock driving the synchronization registers
- initValue
The value taken on by the sync registers at programming
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