class MultiWidthFifoTest extends UnitTest
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- new MultiWidthFifoTest()
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- final def asInstanceOf[T0]: T0
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- val big2little: MultiWidthFifo
- val bl_data: Vec[UInt]
- val bl_finished: Bool
- val bl_recv: Bool
- val bl_recv_cnt: UInt
- val bl_recv_data: UInt
- val bl_recv_data_idx: UInt
- val bl_recv_done: Bool
- val bl_send: Bool
- val bl_send_cnt: UInt
- val bl_send_done: Bool
- val bl_start_recv: Bool
- def circuitName: String
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- final val clock: Clock
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- val lb_data: Vec[UInt]
- val lb_finished: Bool
- val lb_recv: Bool
- val lb_recv_cnt: UInt
- val lb_recv_data: UInt
- val lb_recv_done: Bool
- val lb_send: Bool
- val lb_send_cnt: UInt
- val lb_send_done: Bool
- val lb_start_recv: Bool
- val little2big: MultiWidthFifo
- final lazy val name: String
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- final val reset: Reset
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(Since version Chisel 3.5) Use withClock at Module instantiation
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(Since version Chisel 3.5) Use withClock at Module instantiation
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(Since version Chisel 3.5) Use withClock at Module instantiation
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(Since version Chisel 3.5) Use withClock at Module instantiation